Opcode |
Instruction |
Description |
|---|---|---|
|
66 0F C2 /r ib |
CMPPD xmm1, xmm2/m128, imm8 |
Compare packed double-precision floating-point numbers from xmm2/m128 with packed double-precision floating-point numbers in xmm1, using imm8 as comparison predicate. |
Performs a SIMD compare of the two packed double-precision floating-point numbers in the source operand (second operand) and the destination operand (first operand) and returns the results of the comparison to the destination operand. The comparison predicate operand (third operand) specifies the type of comparison performed on each of the pairs of packed values. The comparison result is two quadword masks of all 1s (comparison true) or all 0s (comparison false). The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register. The comparison predicate operand is an 8-bit immediate the first 3 bits of which define the type of comparison to be made (see following table); bits 4 through 7 of the immediate are reserved.
Predicate |
imm8 Encoding |
Description |
Relation |
Emulation |
Result if NaN Operand |
QNaN Operand Signals Invalid |
|---|---|---|---|---|---|---|
|
eq |
000B |
equal |
xmm1 == xmm2 |
|
False |
No |
|
lt |
001B |
less-than |
xmm1 < xmm2 |
|
False |
Yes |
|
le |
010B |
less-than-or-equal |
xmm1 <= xmm2 |
|
False |
Yes |
|
|
|
greater than |
xmm1 > xmm2 |
swap, protect, lt |
False |
Yes |
|
|
|
greater-than-or-equal |
xmm1 >= xmm2 |
swap protect, le |
False |
Yes |
|
unord |
011B |
unordered |
xmm1 ? xmm2 |
|
True |
No |
|
neq |
100B |
not-equal |
!(xmm1 == xmm2) |
|
True |
No |
|
nlt |
101B |
not-less-than |
!(xmm1 < xmm2) |
|
True |
Yes |
|
nle |
110B |
not-less-than-or-equal |
!(xmm1 <= xmm2) |
|
True |
Yes |
|
|
|
not-greater-than |
!(xmm1 > xmm2) |
swap, protect, nlt |
True |
Yes |
|
|
|
not-greater-than-or-equal |
!(xmm1 >= xmm2) |
swap, protect, nle |
True |
Yes |
|
ord |
111B |
ordered |
!(xmm1 ? xmm2) |
|
False |
No |
Note that a subsequent computational instruction that uses the mask result in the destination operand as an input operand will not generate a fault, since a mask of all 0s corresponds to a floating-point number of +0.0 and a mask of all 1s corresponds to a floating-point number of -QNaN.
Some of the comparisons can be achieved only through software emulation. For these comparisons the programmer must swap the operands, copying registers when necessary to protect the data that will now be in the destination, and then perform the compare using a different predicate. The predicate to be used for these emulations is listed in under the heading Emulation.
Note that the greater-than, greater-than-or-equal, not-greater-than, and not-greater-than-or-equal relations are not directly implemented in hardware.
Compilers and assemblers may implement the following two-operand pseudo-ops in addition to the three-operand CMPPD instruction.
For details, see Volume 2A and Volume 2B of the Intel(R) 64 and IA-32 Intel Architecture Software Developer's Manual. For the latest updates on the instruction set information, go to the web site.