UnorderedCompare(SRC1[63-0] <>
SRC2[63-0]) {* Set EFLAGS *CASE (RESULT) OF
UNORDERED: ZF,PF,CF
111;GREATER_THAN: ZF,PF,CF
000;LESS_THAN: ZF,PF,CF
001;EQUAL: ZF,PF,CF
100;ESAC;
OF,AF,SF
0;
Opcode |
Instruction |
Description |
|---|---|---|
|
0F 2E /r |
UCOMISS xmm1, xmm2/m32 |
Compare lower single-precision floating-point number in xmm1 register with lower single-precision floating-point number in xmm2/mem and set the status flags accordingly. |
Performs and unordered compare of the single-precision floating-point values in the low doublewords of the source operand 1 (first operand) and the source operand 2 (second operand), and sets the ZF, PF, and CF flags in the EFLAGS register according to the result (unordered, greater than, less than, or equal). In The OF, SF and AF flags in the EFLAGS register are set to 0. The unordered predicate is returned if either double-precision floating-point value is a NaN (QNaN or SNaN).
Source operand 1 is an XMM register; source operand 2 can be an XMM register or a 32 bit memory location.
The UCOMISS instruction differs from the COMISS instruction in that it signals an invalid SIMD floating-point exception only when a source operand is an SNaN. The COMISS instruction signals invalid if a source operand is either a QNaN or an SNaN.
The EFLAGS register is not updated in the presence of unmasked SIMD floating-point exceptions.
RESULT UnorderedCompare(SRC1[63-0] <>
SRC2[63-0]) {
* Set EFLAGS *CASE (RESULT) OF
UNORDERED: ZF,PF,CF
111;
GREATER_THAN: ZF,PF,CF
000;
LESS_THAN: ZF,PF,CF
001;
EQUAL: ZF,PF,CF 100;
ESAC;
OF,AF,SF 0;
int_mm_ucomieq_ss(__m128 a, __m128 b) int_mm_ucomilt_ss(__m128 a, __m128 b)
int_mm_ucomile_ss(__m128 a, __m128 b) int_mm_ucomigt_ss(__m128 a, __m128 b)
int_mm_ucomige_ss(__m128 a, __m128 b) int_mm_ucomineq_ss(__m128 a, __m128 b)
Invalid (if SNaN operands), Denormal.
#GP(0) - For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments.
#SS(0) - For an illegal address in the SS segment.
#PF(fault-code) - For a page fault.
#NM - If TS in CR0 is set.
#XM - If an unmasked SIMD floating-point exception and OSXMMEXCPT in CR4 is 1.
#UD - If an unmasked SIMD floating-point exception and OSXMMEXCPT in CR4 is 0. If EM in CR0 is set. If OSFXSR in CR4 is 0. If CPUID feature flag SSE is 0.
#AC - For unaligned memory reference if the current privilege level is 3.
Interrupt 13 - If any part of the operand lies outside the effective address space from 0 to 0FFFFH.
#NM - If TS in CR0 is set.
#XM - If an unmasked SIMD floating-point exception and OSXMMEXCPT in CR4 is 1.
#UD - If an unmasked SIMD floating-point exception and OSXMMEXCPT in CR4 is 0. If EM in CR0 is set. If OSFXSR in CR4 is 0. If CPUID feature flag SSE is 0.
Same exceptions as in Real Address Mode.
#PF(fault-code) - For a page fault.
#AC - For unaligned memory reference if the current privilege level is 3.
For details, see Volume 2A and Volume 2B of the Intel(R) 64 and IA-32 Intel Architecture Software Developer's Manual. For the latest updates on the instruction set information, go to the web site.