SLDT--Store Local Descriptor Table Register

Opcode

Instruction

Description

0F 00 /0

SLDT r/m16

Stores segment selector from LDTR in r/m16

0F 00 /0

SLDT r/m32

Store segment selector from LDTR in low-order 16 bits of r/m32

Description

Stores the segment selector from the local descriptor table register (LDTR) in the destination operand. The destination operand can be a general-purpose register or a memory location. The segment selector stored with this instruction points to the segment descriptor (located in the GDT) for the current LDT. This instruction can only be executed in protected mode.

When the destination operand is a 32-bit register, the 16-bit segment selector is copied into the lower-order 16 bits of the register. The high-order 16 bits of the register are cleared to 0s for the Pentium(R) Pro processor and are undefined for Pentium, Intel486™, and Intel386™ processors. When the destination operand is a memory location, the segment selector is written to memory as a 16-bit quantity, regardless of the operand size.

The SLDT instruction is only useful in operating-system software; however, it can be used in application programs.

Operation

DEST LDTR(SegmentSelector);

Flags Affected

None.

Protected Mode Exceptions

#GP(0) - If the destination is located in a nonwritable segment. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register is used to access memory and it contains a null segment selector.

#SS(0) - If a memory operand effective address is outside the SS segment limit.

#PF(fault-code) If a page fault occurs.

#AC(0) - If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.

Real-Address Mode Exceptions

#UD - The SLDT instruction is not recognized in real-address mode.

Virtual-8086 Mode Exceptions

#UD - The SLDT instruction is not recognized in virtual-8086 mode.

 

 

 

 

 

 

 


For details, see Volume 2A and Volume 2B of the Intel(R) 64 and IA-32 Intel Architecture Software Developer's Manual. For the latest updates on the instruction set information, go to the web site.