BTR--Bit Test and Reset

Description

Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and clears the selected bit in the bit string to 0. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value. If the bit base operand specifies a register, the instruction takes the modulo 16 or 32 (depending on the register size) of the bit offset operand, allowing any bit position to be selected in a 16- or 32-bit register, respectively. If the bit base operand specifies a memory location, it represents the address of the byte in memory that contains the bit base (bit 0 of the specified byte) of the bit string. The offset operand then selects a bit position within the range -2³¹ to 2³¹ - 1 for a register offset and 0 to 31 for an immediate offset.

Some assemblers support immediate bit offsets larger than 31 by using the immediate bit offset field in combination with the displacement field of the memory operand. See BT--Bit Test for more information on this addressing mechanism.

Operation

CF Bit(BitBase, BitOffset)
Bit(BitBase, BitOffset) 0;

Flags Affected

The CF flag contains the value of the selected bit before it is cleared. The OF, SF, ZF, AF, and PF flags are undefined.

Protected Mode Exceptions

#GP(0) - If the destination operand points to a nonwritable segment. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a null segment selector.

#SS(0) - If a memory operand effective address is outside the SS segment limit.

#PF(fault-code) - If a page fault occurs.

#AC(0) - If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.

Real-Address Mode Exceptions

#GP - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.

#SS - If a memory operand effective address is outside the SS segment limit.

Virtual-8086 Mode Exceptions

#GP(0) - If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.

#SS(0) - If a memory operand effective address is outside the SS segment limit.

#PF(fault-code) - If a page fault occurs.

#AC(0) - If alignment checking is enabled and an unaligned memory reference is made.

For details, see Volume 2A and Volume 2B of the Intel(R) 64 and IA-32 Intel Architecture Software Developer's Manual. For the latest updates on the instruction set information, go to the web site.