Opcode |
Instruction |
Description |
---|---|---|
0F 01/7 |
INVLPG m |
Invalidate TLB Entry for page that contains m |
Invalidates (flushes) the translation lookaside buffer (TLB) entry specified with the source operand. The source operand is a memory address. The processor determines the page that contains that address and flushes the TLB entry for that page.
The INVLPG instruction is a privileged instruction. When the processor is running in protected mode, the CPL of a program or procedure must be 0 to execute this instruction.
The INVLPG instruction normally flushes the TLB entry only for the specified page; however, in some cases, it flushes the entire TLB. See MOV--Move to/from Control Registers in this chapter for further information on operations that flush the TLB.
The INVLPG instruction is implementation dependent, and its function
may be implemented differently on future Intel(R) Architecture processors. This instruction is not
supported on Intel(R) Architecture processors earlier than the Intel486
Flush(RelevantTLBEntries);
Continue (* Continue execution);
None.
#GP(0) - If the current privilege level is not 0. #UD Operand is a register.
#UD - Operand is a register.
#GP(0) - The INVLPG instruction cannot be executed at the virtual-8086 mode.
For details, see Volume 2A and Volume 2B of the Intel(R) 64 and IA-32 Intel Architecture Software Developer's Manual. For the latest updates on the instruction set information, go to the web site.