FYL2X--Compute y * log2x

Opcode

Instruction

Description

D9 F1

FYL2X

Replace ST(1) with (ST(1) * log2ST(0)) and pop the register stack

Description

Computes (ST(1) * log2 (ST(0))), stores the result in resister ST(1), and pops the FPU register stack. The source operand in ST(0) must be a non-zero positive number.

The following table shows the results obtained when taking the log of various classes of numbers, assuming that neither overflow nor underflow occurs.

 

ST(0)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ST(1)

 

-

-F

±0

+0 < +F < +1

+1

+F > +1

+

NaN

 

 

 

 

 

 

 

 

 

-

*

*

+

+

*

-

-

NaN

 

 

 

 

 

 

 

 

-F

*

*

**

+F

-0

-F

-

NaN

 

 

 

 

 

 

 

 

-0

*

*

*

+0

-0

-0

*

NaN

 

 

 

 

 

 

 

 

+0

*

*

*

-0

+0

+0

*

NaN

 

 

 

 

 

 

 

 

+F

*

*

**

-F

+0

+F

+

NaN

 

 

 

 

 

 

 

 

+

*

*

-

-

*

+

+

NaN

 

 

 

 

 

 

 

 

NaN

NaN

NaN

NaN

NaN

NaN

NaN

NaN

NaN

 

 

 

 

 

 

 

Note

The FYL2X instruction is designed with a built-in multiplication to optimize the calculation of logarithms with an arbitrary positive base (b):

logbx (log2b)-1 * log2x

Operation

ST(1) ST(1) * log2ST(0);
PopRegisterStack;

FPU Flags Affected

C1 - Set to 0 if stack underflow occurred. Indicates rounding direction if the inexact-result exception (#P) is generated:

0 not roundup; 1 roundup.

C0, C2, C3 - Undefined.

Floating-Point Exceptions

#IS - Stack underflow occurred.

#IA - Either operand is an SNaN or unsupported format. Source operand in register ST(0) is a negative finite value (not -0).

#Z - Source operand in register ST(0) is ±0.

#D - Source operand is a denormal value.

#U - Result is too small for destination format.

#O - Result is too large for destination format.

#P - Value cannot be represented exactly in destination format.

Protected Mode Exceptions

#NM - EM or TS in CR0 is set.

Real-Address Mode Exceptions

#NM - EM or TS in CR0 is set.

Virtual-8086 Mode Exceptions

#NM - EM or TS in CR0 is set.

 

 

 

 

 

 

 


For details, see Volume 2A and Volume 2B of the Intel(R) 64 and IA-32 Intel Architecture Software Developer's Manual. For the latest updates on the instruction set information, go to the web site.