HSUBPD--Packed Double-FP Horizontal Subtract

Instruction

Description

HSUBPD xmm1, xmm2/m128

Subtract horizontally packed DP FP numbers in XMM2/Mem from XMM1.

Description

The HSUBPD instruction subtracts horizontally the packed DP FP numbers of both operands.

Subtracts the double-precision floating-point value in the high quadword of the destination operand from the low quadword of the destination operand and stores the result in the low quadword of the destination operand.

Subtracts the double-precision floating-point value in the high quadword of the source operand from the low quadword of the source operand and stores the result in the high quadword of the destination operand.

Operation

xmm1[63-0] = xmm1[63-0] - xmm1[127-64];

xmm1[127-64] = xmm2/m128[63-0] - xmm2/m128[127-64];

Exceptions

When the source operand is a memory operand, the operand must be aligned on a 16-byte boundary or a general-protection exception (#GP) will be generated.

Numeric Exceptions

Overflow, Underflow, Invalid, Precision, Denormal.

Protected Mode Exceptions

#GP(0) For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments.

#SS(0)For an illegal address in the SS segment.
#PF(fault-code) For a page fault.
#NM If TS bit in CR0 is set.
#XM For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 1).
#UD If CR0.EM = 1. For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 0). If CR4.OSFXSR(bit 9) = 0. If CPUID.PNI(ECX bit 0) = 0.

Real Address Mode Exceptions

Interrupt 13 If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH.

#NM If TS bit in CR0 is set.
#XM For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 1).
#UD If CR0.EM = 1. For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 0). If CR4.OSFXSR(bit 9) = 0. If CPUID.PNI(ECX bit 0) = 0.

Virtual 8086 Mode Exceptions

Interrupt 13 If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH.

#NM If TS bit in CR0 is set.
#XM For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 1).
#UD If CR0.EM = 1. For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 0). If CR4.OSFXSR(bit 9) = 0. If CPUID.PNI(ECX bit 0) = 0. #PF(fault-code) For a page fault.

 

 

 

 

 

 

 

For details, see Volume 2A and Volume 2B of the Intel(R) 64 and IA-32 Intel Architecture Software Developer's Manual. For the latest updates on the instruction set information, go to the web site.