Instruction |
Description |
|---|---|
|
HADDPS xmm1, xmm2/m128 |
Add horizontally packed SP FP numbers from XMM2/Mem to XMM1. |
Adds the single-precision floating-point values in the first and second dwords of the destination operand and stores the result in the first dword of the destination operand.
Adds single-precision floating-point values in the third and fourth dword of the destination operand and stores the result in the second dword of the destination operand.
Adds single-precision floating-point values in the first and second dword of the source operand and stores the result in the third dword of the destination operand.
Adds single-precision floating-point values in the third and fourth dword of the source operand and stores the result in the fourth dword of the destination operand.
xmm1[31-0] = xmm1[31-0] + xmm1[63-32];
xmm1[63-32] = xmm1[95-64] + xmm1[127-96];
xmm1[95-64] = xmm2/m128[31-0] + xmm2/m128[63-32]; xmm1[127-96] = xmm2/m128[95-64] + xmm2/m128[127-96];
When the source operand is a memory operand, the operand must be aligned on a 16-byte boundary or a general-protection exception (#GP) will be generated.
Overflow, Underflow, Invalid, Precision, Denormal.
#GP(0) For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. #SS(0) For an illegal address in the SS segment. #PF(fault-code) For a page fault. #NM If TS bit in CR0 is set. #XM For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 1). #UD If CR0.EM = 1. For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 0). If CR4.OSFXSR(bit 9) = 0. If CPUID.PNI(ECX bit 0) = 0. HADDPS: Packed Single-FP Horizontal Add (Continued).
Interrupt 13 If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH. #NM If TS bit in CR0 is set. #XM For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 1). #UD If CR0.EM = 1. For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 0). If CR4.OSFXSR(bit 9) = 0. If CPUID.PNI(ECX bit 0) = 0.
Interrupt 13 If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH. #NM If TS bit in CR0 is set. #XM For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 1). #UD If CR0.EM = 1. For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 0). If CR4.OSFXSR(bit 9) = 0. If CPUID.PNI(ECX bit 0) = 0. #PF(fault-code) For a page fault.
For details, see Volume 2A and Volume 2B of the Intel(R) 64 and IA-32 Intel Architecture Software Developer's Manual. For the latest updates on the instruction set information, go to the web site.