The Intel(R) Pentium(R) processor with MMX(TM) technology offers several microarchitectural enhancements.
Full support for Intel MMX media enhancement technology. The Intel MMX technology is based on SIMD technique -- Single Instruction, Multiple Data -- which enables increased performance on a wide variety of multimedia and communications applications. Fifty-seven new instructions, as well as new packed data types, are supported by the Pentium processor with MMX technology.
Doubled code and data caches to 16K each. On chip level 1 data and code cache sizes have been doubled to 16KB each on the Pentium processor with MMX technology. Larger separate internal caches improve performance by reducing the average memory access time and providing fast access to recently-used instructions and data. The instruction and data caches can be accessed simultaneously while the dual-ported data cache supports two data references simultaneously. The data cache supports a write-back (or alternatively, write-through, on a line by line basis) policy for memory updates.
Improved branch prediction. Dynamic branch prediction uses the Branch Target Buffer (BTB) to boost performance by predicting the most likely set of instructions to be executed. The BTB has been improved on the Pentium processor with MMX technology to increase its accuracy.
Enhanced pipeline. To improve performance, an additional pipeline stage was added.
Deeper write buffers. A pool of four write buffers is shared between the dual pipelines to improve memory write performance.