Prefix

Prefix indicates a pairing restriction violation.

The instruction for which Prefix is issued has a prefix. On Pentium(R) processors, prefixed instructions can pair only when they are issued to the U pipe.

On Pentium processors with MMX(TM) technology, MMX technology instructions with 0F prefixes and JCC instructions with prefixes can pair, whether they are issued to the U pipe or to the V pipe. Instructions with any other prefixes pair only when they are issued to the U pipe.

Advice:

Try to avoid using prefixed instructions. Follow these guidelines:

Example:

Original

Cycle

Optimized

Cycle


1. mov ax, WORD PTR mem
2. and ax, bx
3. and ax, 0xfff



1
3
5,6



1. mov eax, DWORD PTR mem
2. and eax, 0xfff
3. and eax, ebx



1
2
3

These instructions all use 16-bit register and operands, in 32-bit mode. Their opcodes therefore have prefixes. On the Pentium(R) processor, prefixed instructions take one additional cycle to execute.
Total execution time: 6 cycles (on Pentium processors)

The code is rewritten, to prevent the prefix penalty.
Total execution time: 3 cycles (on Pentium processors)

 

Prefix Penalties

Affected Processors