Floating-point Control Word Overview

On systems based on the IA-32 architecture, the FPU control word includes bits that control the FPU's precision, rounding mode, and whether exceptions generate signals if they occur. You can read the control word value with GETCONTROLFPQQ (IA-32 architecture only) to find out the current control settings, and you can change the control word with SETCONTROLFPQQ (IA-32 architecture only).

Note iconNote

The GETCONTROLFPQQ and SETCONTROLFPQQ routines only affect the x87 status register. They do not affect the MXCSR register (the control and status register for the SSE and SSE2 instructions).

Each bit in the floating-point control word corresponds to a mode of the floating-point math processor. The IFORT.F90 module file in the ...\INCLUDE folder contains the INTEGER(2) parameters defined for the control word, as shown in the following table:

Parameter Name

Value in Hex

Description

FPCW$MCW_PC

#0300

Precision control mask

FPCW$64

#0300

64-bit precision

FPCW$53

#0200

53-bit precision

FPCW$24

#0000

24-bit precision

FPCW$MCW_RC

#0C00

Rounding control mask

FPCW$CHOP

#0C00

Truncate

FPCW$UP

#0800

Round up

FPCW$DOWN

#0400

Round down

FPCW$NEAR

#0000

Round to nearest

FPCW$MCW_EM

#003F

Exception mask

FPCW$INVALID

#0001

Allow invalid numbers

>FPCW$DENORMAL

#0002

Allow denormals (very small numbers)

FPCW$ZERODIVIDE

#0004

Allow divide by zero

FPCW$OVERFLOW

#0008

Allow overflow

FPCW$UNDERFLOW

#0010

Allow underflow

FPCW$INEXACT

#0020

Allow inexact precision

The control word defaults are: